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Application Note AN-11001 Revision: 05 Key Words: 3L, NPC, TNPC, NPC2, MNPC, Multilevel, Loss Calculation, SemiSel Issue Date: 2015-10-12 Prepared by: Ingo Staudt 3L NPC & TNPC Topology General ....
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    Application Note Revision: Issue Date: Prepared by: 05 2015-10-12 Ingo Staudt Key Words: 3L, NPC, TNPC, NPC2, MNPC, Multilevel, Loss Calculation, SemiSel 3L NPC & TNPC Topology AN-11001 1 / 12   2015-10-12  –  Rev05   © by SEMIKRON  General ................................................................................................................................................................. 1   Difference 2L   3L ............................................................................................................................................... 2   Switching pattern of a 3L converter ...................................................................................................................... 3   Commutations and commutation paths ................................................................................................................ 4   3L converter .......................................................................................................................................................... 6   Module consideration ............................................................................................................................................ 6   Setup with standard 2L modules .......................................................................................................................... 6   Dedicated 3L modules .......................................................................................................................................... 7   SEMIKRON 3L modules ....................................................................................................................................... 7   Driving 3L devices ................................................................................................................................................ 7   Normal operation sequences ................................................................................................................................ 7   Emergency shut-down .......................................................................................................................................... 8   Protection of 3L devices against voltage overshoots ........................................................................................... 8   Snubber ................................................................................................................................................................ 8   Active Clamping .................................................................................................................................................... 9   3L loss calculation ................................................................................................................................................ 9   SemiSel ............................................................................................................................................................... 11   Symbols and Terms used ................................................................................................................................... 11   References.......................................................................................................................................................... 12   This application note provides information on two three level topologies: the three level NPC (3L NPC; N eutral P oint C lamped) and the three level TNPC (3L TNPC; T -type N eutral P oint C lamped). The reader will gain insight in elementary thoughts of how these 3L devices work; where advantages and disadvantages are. Some hints concerning the layout/setup of 3L modules are given as well. However, the information given is not exhaustive and the responsibility for a proper design remains with the user. General One benefit of using 3L NPC or 3L TNPC topology is the lower current THD; that reduces the filtering effort (less copper needed, lower losses in the filter).  A major advantage of 3L NPC is the possibility to use IGBTs and diodes with breakdown voltages that are lower than the actual DC-link voltage. The lower blocking devices produce lower losses and so the efficiency can be increased. By using the same blocking voltage as in a 2L applications higher DC-link voltages can be realized. Compared to a 2L phase leg module one phase leg of a 3L NPC module consists of 10 instead of 4 semiconductors (Fig. 1): 4 IGBT s (T1 - T4), 4 antiparallel F ree- W heeling D iodes (FWD; D1 - D4) and 2 C lamping D iodes (CD; D5 and D6).   Application Note AN-11001 2 / 12   2015-10-12  –  Rev05   © by SEMIKRON   Fig. 1: Green box: content of a 3L NPC phase leg T1T2T3T4D1D2D3D4D5D6 AC DC+DC- NC1C2   Four power terminals connect the module to AC and to the DC-link: DC+, DC- and N (neutral). The DC-link is split in two symmetric halves connected in series; the upper half connecting DC+ and N and the lower half connecting N and DC-. In this 3L topology every conduction path consists of two semiconductors in series and it can either handle higher DC-link voltages or the blocking voltage of the switches can be reduced in comparison to a 2L topology. The benefit of 3L TNPC is the 3L output voltage waveform while there are no restrictions to the switching scheme as in 3L NPC (especially in emergency shut-down). Fig. 2: Green box: content of a 3L TNPC phase leg T1T4D1D4T2D2T3D3 DC+DC- NC1C2 AC    A 3L TNPC phase leg (Fig. 2) consists of only 8 semiconductors: 4 IGBT s (T1 - T4) and 4 antiparallel F ree- W heeling D iodes (FWD; D1 - D4). As a 3L NPC the TNPC is connected to the split DC-link at DC+, N and DC-. The fourth power terminal provides the AC output. In 3L TNPC topology semiconductors with different breakdown voltages are used: T1 and T4 (which are refered to as outer   switches) need to withstand the full DC-link voltage. The inner   switches (indices 2 and 3) connect AC to Neutral and must be able to block half of the DC-link voltage. In 3L TNPC topology the conduction paths are either through one higher blocking semiconductors (outer switch) or two lower blocking devices in series (inner switches). Naming the semiconductors as shown in Fig. 1 and Fig. 2 inherits the advantage that the exact same switching pattern can be used for both 3L NPC and 3L TNPC topology. Difference 2L 3L The difference between 2L and 3L topology is not only the number of semiconductor devices. While the well-known 2L converter switches either DC+ or DC- to the  AC terminal (Fig. 3), the 3L versions connect the AC either to DC+, DC- or N. N(eutral) is the midpoint voltage between DC+ and DC- and forms the third voltage level where the three level topology has its name from. Fig. 3: Voltage and current waveforms of 2L 0    V    D   C    /   2  -   V    D   C    /   2  -   V    D   C    V    D   C Output voltage (line to line)Output current   Fig. 4: Voltage and current waveforms of 3L 0    V    D   C    /   2  -   V    D   C    /   2  -   V    D   C    V    D   C Output voltage (line to line)Output current   By introducing a third voltage level the waveform of the output voltage is approximated closer to the desired sine waveform (Fig. 4) and the current THD can be reduced. Thus strong requirements concerning grid quality (when feeding to the grid) can be met more easily. Comparison of 2L   3L NPC/TNPC: NPC & TNPC:   For reaching the same current THD value with 3L topology the switching frequency can be  Application Note AN-11001   3 / 12   2015-10-12  –  Rev05   © by SEMIKRON   reduced leading to reduced switching power losses.   Subsequently operation at a working point producing the same switching frequency as in 2L topology the current THD can be reduced in 3L topology.   In 3L applications the switching frequency can be reduced compared to 2L applications, still improving the THD and reducing the filtering effort.   As the number of IGBTs has increased from 2 to 4 also the number of gate drivers increases. The auxiliary power consumption grows as well as the control effort. NPC:   The number of switches in the active current path in 3L NPC topology is doubled; that increases the conduction power losses.   In 3L NPC applications semiconductors with a lower blocking voltage capability may be used; example: DC-link voltage of 750V can be handled with 1200V 2L or 650V 3L modules (each switch only needs to block 375V). The lower losses of the lower blocking devices compensate the additional losses due to the increased number of devices in the current path.   The maximum DC-link voltages are 800V DC  using 650V semiconductors, 1500V DC  using 1200V semiconductors and 2400V DC  using 1700V semiconductors. TNPC:   The number of switches in the active current path in 3L TNPC topology is either similar to 2L (outer switches) producing the same losses or doubled (with lower blocking voltage; inner switches) leading to higher conduction but lower switching losses.   The maximum DC-link voltages are as for a 2L module: 400V DC  using 650V semiconductors, 800V DC  using 1200V semiconductors and 1200V DC  using 1700V semiconductors. Switching pattern of a 3L converter The control of 3L applications is more sophisticated than 2L. While the 2L switching pattern is pretty simple (TOP and BOT IGBTs always switch inversely) it gets more complicated at 3L as certain switches (namely T2 and T3) are switched on for quite a while depending on the value of cos    (up to a half period for cos    =  ). The number of possible switching states increases from 4 in 2L topology (TOP/BOT: 0/0, 0/1, 1/0, 1/1) to 16.  At 3L NPC a distinction is drawn between allowed, potentially destructive and destructive states (Fig. 5). Fig. 5: Switching states NPC T1  0 0 0 1 0 0 1 0 1 1 0 1 1 1 0 1 T2  0 1 0 1 1 0 0 0 0 0 1 1 1 0 1 1 T3  0 0 1 0 1 1 0 0 0 1 0 1 0 1 1 1 T4  0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 state  allowed potentially destructive destructive    Allowed states:   All IGBTs are in off-state; the converter is switched off.   Either T2 or T3 may be switched on solely.   Each state where two adjacent IGBTs are switched on (T1/T2, T2/T3, T3/T4). Potentially destructive states:   Either T1 or T4 is switched on solely or together.   Two not adjacent IGBTs are switched on (T1/T3 or T2/T4). The consequences depend on the switching pattern applied to the modules of the other phase legs. Destructive states:   Three adjacent IGBTs are switched on (T1/T2/T3 →  shorting upper half of DC-link; T2/T3/T4 →  shorting lower half of DC-link)   Three not adjacent IGBTs are switched on (T1/T2/T4 →  full DC-link voltage applies to T3; T1/T3/T 4 →  full DC-link voltage applies to T2)    Four IGBTs switched on →  DC+, DC- and N shorted.  At 3L TNPC the distinction is drawn only between allowed and destructive states (Fig. 6). Fig. 6: Switching states TNPC T1  0 1 0 0 0 1 0 0 1 0 1 0 1 1 1 1 T2  0 0 1 0 0 1 1 0 0 1 0 1 0 1 1 1 T3  0 0 0 1 0 0 1 1 1 0 0 1 1 0 1 1 T4  0 0 0 0 1 0 0 1 0 1 1 1 1 1 0 1 state  allowed destructive    Allowed states:   All IGBTs are in off-state; the converter is switched off.   Any one of the IGBTs may be switched on solely.   Each state where two adjacent IGBTs are switched on (T1/T2, T2/T3 or T3/T4). Destructive states:   Two not adjacent IGBTs are switched on (T 1/T3 → shorting upper half of DC -link; T2/T4 → shorting lower half of DC -link; T1/T4 → shorting DC+ and DC -).   Application Note AN-11001 4 / 12   2015-10-12  –  Rev05   © by SEMIKRON     Three not adjacent IGBTs are switched on (same consequences as above: shorting either upper half or lower half or the full DC-link)   Four IGBTs switched on → DC+, DC - and N shorted. Commutations and commutation paths NPC & TNPC: Fig. 7 shows a sine voltage (blue trace) and the related current (red trace) at inductive load. The inverter operation can be divided in four operating areas. For cos   = +1 (no phase shift) voltage and current waveforms are in phase; only working areas 1 and 3 are active. For cos  -1 (180° phase shift) only working areas 2 and 4 are active. Fig. 7: Operating areas V > 0 I > 0V < 0 I < 0    V   >   0   I   <   0   V   <   0   I   >   0   V   >   0   I   <   0 V > 0 I > 0   123441  .0.9  i   t( )u   t( )      V  o   l   t  a  g  e   V   C  u  r  r  e  n   t   I   For any value of cos   between -1 and +1 the phase shift changes and so do the time shares of the four working areas. The active switches and the commutations for these four working areas are listed below: 1. both voltage and current are greater than 0 (V > 0, I > 0): 2L: T TOP  ↔   D BOT 3L NPC: T1/T2 ↔ D5/T2 ( short commutation path) 3L TNPC: T1 ↔ D3 2. voltage is less and current is greater than 0 (V < 0, I > 0): 2L: T TOP  ↔   D BOT  3L NPC: D5/T2 ↔ D3/D4 ( long commutation  path ) 3L TNPC: T2/D3 ↔ D4 3. both voltage and current are less than 0 (V < 0, I < 0): 2L: T BOT  ↔   D TOP  3L NPC: T3/ T4 ↔ T3/D6 ( short commutation path ) 3L TNPC: T4 ↔ T3/D2 4. voltage is greater and current is less than 0 (V > 0, I < 0): 2L: T BOT  ↔   D TOP  3L NPC: T3/D6 ↔ D1/D2 ( long commutation  path ) 3L TNPC: T3/D2 ↔ D1 NPC: While in a “ short commutation path ” the commutation affects only one of the two active switches (e.g. T1 ↔ D5) the current through the other active switch does not change (e.g. T2). In a “ long commutation path ” (e.g. D5/T2 ↔ D3/D4 ) both devices are affected. The name “ short/long commutation path ” also indica tes the geometric length of the commutations; while the short commutation takes place either within the upper or the lower half of the 3L module in a long commutation the current changes from the upper to the lower half (or vice versa). Fig. 8: Short commutation path in operating area 1 T1T2T3T4D1D2D3D4D5D6 DC+DC- N    V    D   C    /   2 T1T2T3T4D1D2D3D4D5D6N 1.  ACAC    V    D   C    /   2   V    D   C    /   2   V    D   C    /   2 DC+DC- I  AC I  AC   The short commutation (Fig. 8) in the upper half of the module (device indices 1, 2 and 5) is active in operating area 1 (Fig. 9); both voltage and current are positive. The commutation goes back and forth between T1 and D5; the current flows from DC+ via T1 and T2 to the AC terminal as long as T1 is switched on. When T1 switches off, the current commutates to the clamping diode D5; now the current flow is from N via D5 and T2 to AC. T2 stays switched on all the time. Fig. 9: Operating area 1 U x( )I x( ) 14 V > 0 I > 0    V   >   0   I   <   0  ..  i    t( )u    t( )      V  o   l   t  a  g  e   V   C  u  r  r  e  n   t   I   The long commutation for positive output current (Fig. 10) goes back and forth between D5/T2 in the upper half of the module and D3/D4 in the lower half => across the entire device.
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